One of the primary goals in the design of a paging system is the maximization of battery life. Because there are few real-time processing constraints, synchronous time slots may be used for sending messages. A given pager looks for its address in a predetermined number of frames within a frame cycle, and stays idle the rest of the time. This time slot approach represents a trade off between delivery latency and energy conservation. One such paging protocol is the FLEX® protocol, proffered my Motorola, Inc.
The FLEX® protocol employs a pulse amplitude modulation/frequency modulation (PAM/FM) scheme for generating transmit symbols. Four possible bit patterns, {00, 01, 10, 11}, are pulse amplitude modulated to generate a waveform having a corresponding magnitude mapping of {00→−3,01→−1,11→+1,10→+3}. The spectrum of the 4-level PAM signal is shaped by a 10th order Bessel filter, and the resulting baseband signal is passed through a D/A converter before being FM modulated with the following deviation between symbols: {00→−4800 Hz,01→−1600 Hz,11→+1600 Hz,10→+4800 Hz}.
Pagers implementing the FLEX protocol are assigned a particular phase depending on the time slots within the frame cycle in which they are to look for messages addressed to them. The most significant bits of the 4-ary symbols belong to phase A, while the least significant bits belong to phase B, and so on with phases C and D. Because of the small length of the messages to be delivered, the mobile messaging system uses short block error control codes that generate a set of parity bits from a fixed set of information bits. The FLEX protocol uses a (31,21) Bose-Chaudhuri-Hocquenghem (BCH) code (i.e., 21 information bits and 10 parity bits), extended to a (32,21) code with the addition of an even parity bit. The resulting (32, 21) code can correct all double-error patterns and detect all triple-error patterns.
In the pager unit there is a trade off that must be considered between accuracy and processing load. Generally, the higher degree of accuracy desired, the higher the processing load on the receiver (processor) in the pager. Various decoding techniques are available for determining the received symbols. These techniques include soft decision decoders where probability values for the received bits are determined and refined, and hard decision techniques that make a 0/1 determination for the received bits.
Generally, in the decoding process of a digital system, the use of soft information, delivered by a demodulator, has been shown to achieve significant gain over a strictly hard decision technique. Knowledge of channel measurement information allows a soft decision decoder to estimate the reliability of the observation symbols and treat them accordingly. A hard decision decoder, on the other hand, operates on the received values regardless of their degree of reliability by mapping them onto the code alphabet. The hard decision technique cannot distinguish small errors from large ones.
Implementation of an optimum soft decision technique is computationally intensive and generally not feasible in an operating environment such as a paging system. There are a number of sub-optimum techniques that may be used to provide some of the increased accuracy of soft decision making without all of the computational load. One such class of sub-optimum decoders uses algebraic hard decision decoders (HDD) in conjunction with soft decision decoding algorithms. The resulting soft decision decoders (SDDs) are more complex than the original HDDs, but the performance improvement is substantial. Two known algebraic SDD algorithms are the Chase algorithm and the Generalized Minimum Distance (GMD) algorithm.
The basic idea underlying the algebraic SDD techniques is the use of “soft” symbol reliability information to postulate the location of likely errors in the received words. Through the use of appropriate metrics, the decoder tracks the symbols with the lowest reliability, and focuses the decoding capability on those symbols. The performance of the soft decision algorithm thus depends on the ability of the application to successfully locate the least reliable bits in a received word.
Due to interleaving and demodulation methods used in the FLEX protocol, there may be a performance difference between phase A (message in most significant bits) and phase B (message in least significant bits) pagers. This performance difference is similar for phases C and D.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.